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19-4305; Rev 0; 10/08
KIT ATION EVALU ILABLE AVA
Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies
General Description
The MAX17031 is a dual Quick-PWMTM step-down power-supply (SMPS) controller with synchronous rectification, intended for main 5V/3.3V power generation in battery-powered systems. Low-side MOSFET sensing provides a simple low-cost, highly efficient current sense for valley current-limit protection. Combined with the output overvoltage and undervoltage protection features, this current limit ensures robust output supplies. The 5V/3.3V SMPS outputs can save power by operating in pulse-skipping mode or in ultrasonic mode to avoid audible noise. Ultrasonic mode forces the controller to maintain switching frequencies greater than 20kHz at light loads. The SKIP input also has an accurate logic threshold, allowing it to be used as a secondary feedback input to refresh an external charge pump or secondary winding without overcharging the output voltages. An internal 100mA linear regulator generates the 5V bias needed for power-up or other low-power "alwayson" suspend supplies. An internal bypass circuitry allows automatic bypassing of the linear regulator when the 5V SMPS is active. The device includes independent shutdown controls with well-defined logic thresholds to simplify power-up and power-down sequencing. To prevent current surges at startup, the internal voltage target is slowly ramped up from zero to the final target over a 1ms period. To prevent the output from ringing below ground in shutdown, the internal voltage target is ramped down from its previous value to zero over a 1ms period. A combined power-good (PGOOD) output simplifies the interface with external controllers. The MAX17031 is available in a 24-pin thin QFN (4mm x 4mm) package. o Dual Quick-PWM o Preset 5V and 3.3V Outputs o Internal 100mA, 5V Linear Regulator o Internal OUT1 LDO5 Bypass Switch o Secondary Feedback (SKIP Input) Maintains Charge Pump o 3.3V, 5mA Real-Time Clock (RTC) Power (Always On) o 2V 1% 50A Reference o 6V to 24V Input Range o Pulse-Skipping/Forced-PWM/Ultrasonic Mode Control o Independent SMPS and LDO5 Enable Controls o Combined SMPS PGOOD Outputs o Minimal Component Count
Features
MAX17031
Ordering Information
PART MAX17031ETG+ TEMP RANGE -40C to +85C PIN-PACKAGE 24 TQFN-EP*
+Denotes a lead-free/RoHS-compliant package. *EP = Exposed pad.
Pin Configuration
BST2 DL2 VDD BST1 13 12 11 10 LX1 DH1 ON1 PGOOD ILIM1 OUT1 9 *EP 8 7 1 REF 2 ONLDO 3 VCC 4 RTC 5 IN 6 LDO5 GND DL1 14
TOP VIEW
18 LX2 19 DH2 20 ON2 21 SKIP 22 OUT2 23 ILIM2 24
17
16
15
Applications
Notebook Computers Ultra-Mobile PC Main System Supply (5V and 3.3V Supplies) 2 to 4 Li+ Cells Battery-Powered Devices Telecommunication
MAX17031
+
THIN QFN 4mm x 4mm
Quick-PWM is a trademark of Maxim Integrated Products, Inc.
*EXPOSED PAD.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies MAX17031
ABSOLUTE MAXIMUM RATINGS
IN to GND ...............................................................-0.3V to +28V VDD, VCC to GND .....................................................-0.3V to +6V RTC, LDO5, ONLDO to GND ...................................-0.3V to +6V OUT2 to GND ...........................................................-0.3V to +6V ON1, ON2, PGOOD to GND.....................................-0.3V to +6V OUT1 to GND..........................................-0.3V to (VLDO5 + 0.3V) SKIP to GND...............................................-0.3V to (VCC + 0.3V) REF, ILIM1, ILIM2 to GND ..........................-0.3V to (VCC + 0.3V) DL_ to GND ................................................-0.3V to (VDD + 0.3V) BST_ to GND ..........................................................-0.3V to +36V BST_ to VDD............................................................-0.3V to +30V DH1 to LX1 ..............................................-0.3V to (VBST1 + 0.3V) BST1 to LX1..............................................................-0.3V to +6V Note: Measurements are valid using a 20MHz bandwidth limit.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DH2 to LX2 ..............................................-0.3V to (VBST2 + 0.3V) BST2 to LX2..............................................................-0.3V to +6V LDO5, RTC, REF Short Circuit to GND.......................Momentary RTC Current Continuous.....................................................+5mA LDO5 Current (Internal Regulator) Continuous ..............+100mA LDO5 Current (Switched Over) Continuous ...................+200mA Continuous Power Dissipation (TA = +70C) 24-Pin, 4mm x 4mm Thin QFN (T2444-3) (derate 27.8mW/C above +70C) .................................2.22W Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 2, no load on LDO5, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSKIP = 5V, ONLDO = RTC, ON1 = ON2 = VCC, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER INPUT SUPPLIES IN Input Voltage Range IN Standby Supply Current IN Shutdown Supply Current IN Supply Current VCC Bias Supply Current PWM CONTROLLERS OUT1 Output-Voltage Accuracy OUT2 Output-Voltage Accuracy Load Regulation Error Line Regulation Error DH1 On-Time DH2 On-Time Minimum Off-Time Soft-Start Slew Rate Ultrasonic Operating Frequency t ON1 t ON2 t OFF(MIN) t SS VOUT1 VOUT2 VSKIP = 1.8V VSKIP = 1.8V Either SMPS, VSKIP = 1.8V, ILOAD = 0 to 5A Either SMPS, VSKIP = GND, ILOAD = 0 to 5A Either SMPS, VSKIP = VCC, ILOAD = 0 to 5A Either SMPS, IN = 6V to 28V VOUT1 = 5.0V (Note 1) VOUT2 = 3.3V (Note 1) (Note 1) Rising/falling edge on ON1 or ON2 20 895 833 4.95 3.267 5.00 3.30 -0.1 -1.7 -1.5 0.005 1052 925 300 1 34 1209 1017 400 %/V ns ns ns ms kHz % 5.05 3.333 V V I IN I VCC LDO5 in regulation VIN = 6V to 24V, ON1 = ON2 = GND, ONLDO = RTC VIN = 4.5V to 24V, ON1 = ON2 = ONLDO = GND ON1 = ON2 = VCC, VSKIP = VCC; VOUT1 = 5.3V, VOUT2 = 3.5V ON1 = ON2 = VCC, VSKIP = VCC; VOUT1 = 5.3V, VOUT2 = 3.5V 6 85 40 0.1 0.7 24 175 70 0.2 1.5 V A A mA mA SYMBOL CONDITIONS MIN TYP MAX UNITS
f SW(USONIC) VSKIP = GND
2
_______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 2, no load on LDO5, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSKIP = 5V, ONLDO = RTC, ON1 = ON2 = VCC, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER LINEAR REGULATOR (LDO5) LDO5 Output-Voltage Accuracy LDO5 Short-Circuit Current LDO5 Regulation Reduction/ Bootstrap Switchover Threshold LDO5 Bootstrap Switch Resistance VCC Undervoltage Lockout Threshold Thermal-Shutdown Threshold T SHDN VLDO5 VIN = 6V to 24V, ON1 = GND, 0 < ILDO5 < 100mA LDO5 = GND Falling edge of OUT1 Rising edge of OUT1 LDO5 to OUT1, V OUT1 = 5V (Note 3) Falling edge of VCC, PWM disabled below this threshold Rising edge of VCC Hysteresis = 10C ON1 = ON2 = GND, VIN = 6V to 24V, 0 < IRTC < 5mA ON1 = ON2 = ONLDO = GND, VIN = 6V to 24V, 0 < IRTC < 5mA RTC = GND VREF VREF VREF(UVLO) VCC = 4.5V to 5.5V, IREF = 0 IREF = -20A to +50A Rising edge, 350mV (typ) hysteresis 3.3V ALWAYS-ON LINEAR REGULATOR (RTC) 3.23 3.19 5 1.980 -10 1.95 2.00 3.33 3.43 V 3.47 22 2.020 +10 mA V mV V 3.8 4.90 100 -11.0 -8.8 -7.0 1.9 4.0 4.2 160 C 4.5 4.3 V 5.0 5.10 260 -6.0 V mA % SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX17031
RTC Output-Voltage Accuracy
VRTC
RTC Short-Circuit Current REFERENCE (REF) Reference Voltage Reference Load Regulation Error REF Lockout Voltage OUT1 FAULT DETECTION OUT1 Overvoltage and PGOOD Trip Threshold OUT1 Overvoltage Fault Propagation Delay OUT1 Undervoltage Protection Trip Threshold OUT1 Output Undervoltage Fault Propagation Delay OUT2 FAULT DETECTION OUT2 Overvoltage and PGOOD Trip Threshold OUT2 Overvoltage Fault Propagation Delay OUT2 Undervoltage Protection Trip Threshold OUT2 Output Undervoltage Fault Propagation Delay tUVP t OVP tUVP t OVP
With respect to error comparator threshold OUT1 forced 50mV above trip threshold With respect to error comparator threshold
10
13 10
16
% s
65
70 10
75
% s
With respect to error comparator threshold OUT2 forced 50mV above trip threshold With respect to error comparator threshold
10
13 10
16
% s
65
70 10
75
% s
_______________________________________________________________________________________
3
Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies MAX17031
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 2, no load on LDO5, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSKIP = 5V, ONLDO = RTC, ON1 = ON2 = VCC, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER POWER-GOOD PGOOD Lower Trip Threshold PGOOD Propagation Delay PGOOD Output Low Voltage t PGOOD With respect to either error comparator threshold, falling edge, hysteresis = 1% OUT1 or OUT2 forced 50mV beyond PGOOD trip threshold, falling edge ON1 or ON2 = GND (PGOOD low impedance), I SINK = 4mA I PGOOD OUT1 and OUT2 in regulation (PGOOD high impedance), PGOOD forced to 5.5V, TA = +25C 0.2 5 RILIM _ = 100k (VILIM _ = 500mV) Valley Current-Limit Threshold (Adjustable) VLIM_ (VAL) VAGND - VLX_ RILIM _ = 200k (VILIM _ = 1.00V) RILIM _ = 400k (VILIM _ = 2.00V) Current-Limit Threshold (Negative) Ultrasonic Current-Limit Threshold Current-Limit Threshold (Zero Crossing) GATE DRIVERS DH_ Gate-Driver On-Resistance DL_ Gate-Driver On-Resistance DH_ Gate-Driver Source/Sink Current DL_ Gate-Driver Source Current DL_ Gate-Driver Sink Current Dead Time Internal BST_ Switch On-Resistance BST_Leakage Current RDH RDL IDH IDL
(SOURCE)
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
-16
-13 10
-10
% s
0.3
V
PGOOD Leakage Current CURRENT LIMIT ILIM_ Adjustment Range ILIM_ Current
1
A
2
V A
44 90 180
50 100 200 -120 20 1.5
56 110 220 % mV mV mV
VNEG VNEG(US) VZX
With respect to valley current-limit threshold, VSKIP = VREF VOUT2 = 3.5V, VOUT1 = 5.3V VAGND - VLX_, VSKIP = VCC or GND BST1 - LX1 and BST2 - LX2 forced to 5V DL1, DL2; high state DL1, DL2; low state DH1, DH2 forced to 2.5V, BST1 - LX1 and BST2 - LX2 forced to 5V DL1, DL2 forced to 2.5V DL1, DL2 forced to 2.5V DL1, DL2 rising (Note 4) DH1, DH2 rising (Note 4) IBST _ = 10mA, VDD = 5V VBST _ = 26V, TA = +25C; OUT1 and OUT2 above regulation threshold
1.5 1.4 0.5 2 1.7 3.3 30 35 5.5 0.1
3.5 4.5 1.5 A A A ns
IDL (SINK) tDEAD RBST
5
A
4
_______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 2, no load on LDO5, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSKIP = 5V, ONLDO = RTC, ON1 = ON2 = VCC, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER INPUTS AND OUTPUTS SKIP Input Thresholds SKIP Leakage Current ON_ Input-Logic Levels ON_ Leakage Current OUT_ Leakage Current Upper SKIP/PWM threshold falling edge, 33mV hysteresis Lower PWM/ultrasonic threshold VSKIP = 0 or 5V, TA = +25C ONLDO, ON1, ON2 High (SMPS on) Low (SMPS off) -2 15 5 1.94 0.4 -1 2.4 0.8 +2 65 30 2.0 2.06 1.6 +1 A V A A V SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX17031
VON1 = V ON2 = V ONLDO = 0 or 5V, TA = +25C VON1 = V ON2 = VCC VOUT1 = 5.3V VOUT2 = 3.5V
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 2, no load on LDO5, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSKIP = 5V, ONLDO = RTC, ON1 = ON2 = VCC, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER INPUT SUPPLIES IN Input Voltage Range IN Standby Supply Current IN Shutdown Supply Current IN Supply Current VCC Bias Supply Current PWM CONTROLLERS OUT1 Output-Voltage Accuracy OUT2 Output-Voltage Accuracy DH1 On-Time DH2 On-Time Minimum Off-Time Ultrasonic Operating Frequency VOUT1 VOUT2 t ON1 t ON2 t OFF(MIN) VSKIP = 1.8V VSKIP = 1.8V VOUT1 = 5.0V (Note 1) VOUT2 = 3.3V (Note 1) (Note 1) 18 4.90 3.234 895 833 5.10 3.366 1209 1017 400 V V ns ns ns kHz I IN I VCC LDO5 in regulation VIN = 6V to 24V, ON1 = ON2 = GND, ONLDO = RTC VIN = 4.5V to 24V, ON1 = ON2 = ONLDO = GND ON1 = ON2 = VCC, VSKIP = VCC, VOUT1 = 5.3V, VOUT2 = 3.5V ON1 = ON2 = VCC, VSKIP = VCC, VOUT1 = 5.3V, VOUT2 = 3.5V 6 24 200 70 0.2 1.5 V A A mA mA SYMBOL CONDITIONS MIN TYP MAX UNITS
f SW(USONIC) VSKIP = GND
_______________________________________________________________________________________
5
Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies MAX17031
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 2, no load on LDO5, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSKIP = 5V, ONLDO = RTC, ON1 = ON2 = VCC, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER LINEAR REGULATOR (LDO5) LDO5 Output-Voltage Accuracy LDO5 Short-Circuit Current LDO5 Regulation Reduction/ Bootstrap Switchover Threshold LDO5 Bootstrap Switch Resistance VCC Undervoltage Lockout Threshold 3.3V ALWAYS-ON LINEAR REGULATOR (RTC) ON1 = ON2 = GND, VIN = 6V to 24V, 0 < IRTC < 5mA ON1 = ON2 = ONLDO = GND, VIN = 6V to 24V, 0 < IRTC < 5mA RTC = GND VREF VREF VCC = 4.5V to 5.5V, IREF = 0 IREF = -20A to +50A 3.18 3.16 5 1.975 -10 3.45 V 3.50 22 2.025 +10 mA V mV VLDO5 VIN = 6V to 24V, ON1 = GND; 0mA < ILDO5 < 100mA LDO5 = GND Falling edge of OUT1 LDO5 to OUT1, V OUT1 = 5V (Note 3) Falling edge of VCC, PWM disabled below this threshold 3.8 -12.0 4.85 5.15 260 -5.0 4.5 4.3 V V mA % SYMBOL CONDITIONS MIN TYP MAX UNITS
RTC Output-Voltage Accuracy
VRTC
RTC Short-Circuit Current REFERENCE (REF) Reference Voltage Reference Load Regulation Error OUT1 FAULT DETECTION OUT1 Overvoltage and PGOOD Trip Threshold OUT1 Undervoltage Protection Trip Threshold OUT2 FAULT DETECTION OUT2 Overvoltage and PGOOD Trip Threshold OUT2 Undervoltage Protection Trip Threshold POWER-GOOD PGOOD Lower Trip Threshold PGOOD Output Low Voltage
With respect to error comparator threshold With respect to error comparator threshold
10 63
16 77
% %
With respect to error comparator threshold With respect to error comparator threshold
10 63
16 77
% %
With respect to either error comparator threshold, falling edge, hysteresis = 1% ON1 or ON2 = GND (PGOOD low impedance), I SINK = 4mA
-16
-10 0.3
% V
6
_______________________________________________________________________________________
Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 2, no load on LDO5, RTC, OUT1, OUT2, and REF, VIN = 12V, VDD = VCC = VSKIP = 5V, ONLDO = RTC, ON1 = ON2 = VCC, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER CURRENT LIMIT ILIM_ Adjustment Range RILIM _ = 100k (VILIM _ = 500mV) Valley Current-Limit Threshold (Adjustable) VLIM _ (VAL) VAGND - VLX_ RILIM _ = 200k (VILIM _ = 1.00V) RILIM _ = 400k (VILIM _ = 2.00V) GATE DRIVERS DH_ Gate-Driver On-Resistance DL_ Gate-Driver On-Resistance INPUTS AND OUTPUTS SKIP Input Thresholds Upper SKIP/PWM threshold falling edge, 33mV hysteresis Lower PWM/ultrasonic threshold ON_ Input-Logic Levels ONLDO, ON1, ON2 High (SMPS on) Low (SMPS off) 1.94 0.4 2.4 0.8 2.06 1.6 V V RDH RDL BST1 - LX1 and BST2 - LX2 forced to 5V DL1, DL2; high state DL1, DL2; low state 3.5 4.5 1.5 0.2 40 85 164 2 60 115 236 mV V SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX17031
Note 1: On-time and off-time specifications are measured from 50% point to 50% point at the DH pin with LX = GND, VBST = 5V, and a 500pF capacitor from DH to LX to simulate external MOSFET gate capacitance. Actual in-circuit times might be different due to MOSFET switching speeds. Note 2: Specifications to TA = -40C are guaranteed by design and not production tested. Note 3: Specification increased by 1 to account for test measurement error. Note 4: Production tested for functionality only.
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7
Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies MAX17031
Typical Operating Characteristics
(Circuit of Figure 1, VIN = 12V, VDD = VCC = 5V, TA = +25C, unless otherwise noted.)
5V OUTPUT EFFICIENCY vs. LOAD CURRENT
MAX17031 toc01
5V OUTPUT EFFICIENCY vs. LOAD CURRENT
95 90 EFFICIENCY (%) 85 80 75 70 65 60 ULTRASONIC MODE PWM MODE SKIP MODE
MAX17031 toc02
3.3V OUTPUT EFFICIENCY vs. LOAD CURRENT
95 90 EFFICIENCY (%) 85 80 75 70 65 60 7V 20V SKIP MODE PWM MODE 0.01 0.1 1 10 12V
MAX17031 toc03
100 95 90 EFFICIENCY (%) 85 80 75 70 65 60 55 50 0.01 0.1 1 SKIP MODE PWM MODE 20V 7V 12V
100
100
55 50 10 0.01 0.1 1
12V INPUT 10
55 50
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
3.3V OUTPUT EFFICIENCY vs. LOAD CURRENT
MAX17031 toc04
SMPS OUTPUT-VOLTAGE DEVIATION vs. LOAD CURRENT
MAX17031 toc05
SWITCHING FREQUENCY vs. LOAD CURRENT
PWM MODE SWITCHING FREQUENCY (kHz)
MAX17031 toc06
100 95 90 EFFICIENCY (%) 85 80 75 70 65 60 55 50 0.01 0.1 1 12V INPUT ULTRASONIC MODE PWM MODE SKIP MODE
3 OUTPUT-VOLTAGE DEVIATION (%) 2 1 0 -1 PWM MODE -2 12V INPUT -3 SKIP MODE
1000
LOW-NOISE ULTRASONIC MODE
100
10 SKIP MODE
LOW-NOISE ULTRASONIC MODE
12V INPUT 1 10 0.01 0.1 1 10
10
0.01
0.1
1
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
5V LDO OUTPUT VOLTAGE vs. LOAD CURRENT
MAX17031 toc07
3.3V RTC OUTPUT VOLTAGE vs. LOAD CURRENT
MAX17031 toc08
NO-LOAD INPUT SUPPLY CURRENT vs. INPUT VOLTAGE
ICC + IDD PWM MODE SUPPLY CURRENT (mA) 10 LOW-NOISE ULTRASONIC MODE
MAX17031 toc09
5.2
3.5
100
5.1 OUTPUT VOLTAGE (V)
3.4 OUTPUT VOLTAGE (V)
5.0
3.3
1
4.9
3.2
0.1 SKIP MODE 0.01
4.8
3.1
4.7 0 20 40 60 80 100 120 140 160 LOAD CURRENT (mA)
3.0 0 2 4 6 8 10 12 LOAD CURRENT (mA)
0
5
10
15
20
25
INPUT VOLTAGE (V)
8
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Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VIN = 12V, VDD = VCC = 5V, TA = +25C, unless otherwise noted.)
STANDBY AND SHUTDOWN INPUT SUPPLY CURRENT vs. INPUT VOLTAGE
MAX17031 toc10
MAX17031
REFERENCE OFFSET VOLTAGE DISTRIBUTION
TA = +85C TA = +25C
MAX17031 toc11
100mV ILIM THRESHOLD VOLTAGE DISTRIBUTION
TA = +85C TA = +25C SAMPLE PERCENTAGE (%) 40 SAMPLE SIZE = 150
MAX17031 toc12
0.1 ICC + IDD
70 60 SAMPLE PERCENTAGE (%) 50 40 30 20 10
50
SAMPLE SIZE = 150
SUPPLY CURRENT (mA)
STANDBY (ONLDO = RTC, ON1 = ON2 = GND) 0.01 SHUTDOWN (ONLDO = ON1 = ON2 = GND)
30
20
10
0.001 0 5 10 15 20 25 INPUT VOLTAGE (V)
0 -20 -12 -4 4 12 20 2V OFFSET VOLTAGE (mV)
0 90 94 98 102 106 110 ILIM THRESHOLD VOLTAGE (mV)
LDO AND RTC POWER-UP
MAX17031 toc13
LDO AND RTC POWER REMOVAL
MAX17031 toc14
5V LDO LOAD TRANSIENT
MAX17031 toc15
12V
A 12V B 5V
12V A 12V 5V 5V A
0V 0V C 3.3V D 2.0V 3.3V 2V B 5V C 3.3V D 2.0V
0V 0V
0.1A 0A 4s/div A. LDO OUTPUT, 100mV/div B. LDO CURRENT, 100mA/div B
200s/div A. INPUT SUPPLY, 5V/div C. 3.3V RTC, 2V/div B. 5V LDO, 2V/div D. 1.0 REF, 1V/div
200s/div A. INPUT SUPPLY, 5V/div C. 3.3V RTC, 2V/div B. 5V LDO, 2V/div D. 2.0 REF, 1V/div
5V SMPS STARTUP AND SHUTDOWN
MAX17031 toc16
STARTUP WAVEFORMS (SWITCHING REGULATORS)
MAX17031 toc17
SHUTDOWN WAVEFORMS (SWITCHING REGULATORS)
MAX17031 toc18
SKIP MODE 5V A 5V 5V 0V 5V 5V B 5V 0V 5V C 0V 200s/div A. 5V LDO OUTPUT, 0.2V/div C. ON1, 5V/div B. 5V SMPS OUTPUT, 2V/div 200s/div A. ON1, 5V/div C. PGOOD, 5V/div B. 5V SMPS OUTPUT, D. INDUCTOR CURRENT, 2V/div 5A/div 200s/div A. ON1, 5V/div C. PGOOD, 2V/div B. 5V SMPS OUTPUT, D. INDUCTOR CURRENT, 2V/div 5A/div 5V 0V 0V 0A C D 0V 0V 0A B C D A 5V 0V 5V A
B 5V
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9
Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies MAX17031
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VIN = 12V, VDD = VCC = 5V, TA = +25C, unless otherwise noted.)
5V SMPS LOAD TRANSIENT (1A TO 4A)
MAX17031 toc19
3.3V SMPS LOAD TRANSIENT (1A TO 4A)
MAX17031 toc20
POWER REMOVAL (SMPS UVLO RESPONSE)
MAX17031 toc21
12V 4A A 0A 5V B 0A 3.3V B 5V B 0V C 0V D 0V 4A A 5V A 0V
5V 0A C 0A C
40s/div A. LOAD CURRENT, 2A/div C. INDUCTOR CURRENT, B. 5V SMPS OUTPUT, 2A/div 100mV/div
40s/div A. LOAD CURRENT, 2A/div C. INDUCTOR CURRENT, B. 3.3V SMPS OUTPUT, 2A/div 100mV/div
10ms/div A. INPUT VOLTAGE, 5V/div C. 5V SMPS, 2V/div B. 5V LDO OUTPUT, 2V/div D. PGOOD, 5V/div
Pin Description
PIN NAME FUNCTION 2V Reference Voltage Output. Bypass REF to analog ground with a 0.22F or greater ceramic capacitor. The reference can source up to 50A for external loads. Loading REF degrades output voltage accuracy according to the REF load regulation error (see Typical Operating Characteristics). The reference shuts down when ON1, ON2, and ONLDO are all pulled low. Enable Input for LDO5. Drive ONLDO high (pull up to RTC) to enable the linear regulator (LDO5) output. Drive ONLDO low to shut down the linear regulator output. When ONLDO is high, LDO5 must supply VCC and VDD. Analog Supply Voltage Input. Connect VCC to the system supply voltage with a series 50 resistor, and bypass to analog ground using a 1F or greater ceramic capacitor. 3.3V Always-On Linear Regulator Output for RTC Power. Bypass RTC with a 1F or greater ceramic capacitor to analog ground. RTC can source up to 5mA for external loads. Power Input Supply. Bypass IN with a 0.1F or greater ceramic capacitor to GND. IN powers the linear regulators (RTC and LDO5) and senses the input voltage for the Quick-PWM on-time oneshot timer. The DH on-time is inversely proportional to input voltage. 5V Linear Regulator Output. Bypass LDO5 with a 4.7F or greater ceramic capacitor to GND. LDO5 can source 100mA for external load support. LDO5 is powered from IN. Output-Voltage Sense Input for SMPS1 and Linear Regulator Bypass Input. OUT1 is an input to the Quick-PWM on-time one-shot timer. OUT1 also serves as the feedback input for the SMPS1. When OUT1 exceeds 93.5% of the LDO5 voltage, the controller bypasses the LDO5 output to OUT1. The bypass switch is disabled if the OUT1 voltage drops by 8.5% from LDO5 nominal regulation threshold. Valley Current-Limit Adjustment for SMPS1. The GND - LX1 current-limit threshold is 1/10 the voltage present on ILIM1 over a 0.2V to 2V range. An internal 5A current source allows this voltage to be set with a single resistor between ILIM1 and analog ground.
1
REF
2
ONLDO
3 4
VCC RTC
5
IN
6
LDO5
7
OUT1
8
ILIM1
10
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Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies
Pin Description (continued)
PIN NAME FUNCTION Open-Drain Power-Good Output for SMPS1 and SMPS2. PGOOD is low when either output voltage is more than 15% (typ) below the nominal regulation threshold, during soft-start, in shutdown, when either SMPS is disabled, and after the fault latch has been tripped. After the soft-start circuit has terminated, PGOOD becomes high impedance if both outputs are in regulation. Enable Input for SMPS1. Drive ON1 high to enable SMPS1. Drive ON1 low to shut down SMPS1. High-Side Gate-Driver Output for SMPS1. DH1 swings from LX1 to BST1. Inductor Connection for SMPS1. Connect LX1 to the switched side of the inductor. LX1 is the lower supply rail for the DH1 high-side gate driver. Boost Flying Capacitor Connection for SMPS1. Connect to an external capacitor as shown in Figure 1. An optional resistor in series with BST1 allows the DH1 turn-on current to be adjusted. Low-Side Gate-Driver Output for SMPS1. DL1 swings from power GND to VDD. Supply Voltage Input for the DL_ Gate Drivers. VDD is internally connected to the drain of the HVPV BST diode switch. Connect to a 5V supply, and bypass VDD to power GND with a 1F or greater ceramic capacitor. Analog and Power Ground Low-Side Gate-Driver Output for SMPS2. DL2 swings from power GND to VDD. Boost Flying Capacitor Connection for SMPS2. Connect to an external capacitor as shown in Figure 1. An optional resistor in series with BST2 allows the DH2 turn-on current to be adjusted. Inductor Connection for SMPS2. Connect LX2 to the switched side of the inductor. LX2 is the lower supply rail for the DH2 high-side gate driver. High-Side Gate-Driver Output for SMPS2. DH2 swings from LX2 to BST2. Enable Input for SMPS2. Drive ON2 high to enable SMPS2. Drive ON2 low to shut down SMPS2. Pulse-Skipping Control Input. This three-level input determines the operating mode for the switching regulators: High (> 2V) = pulse-skipping mode Middle (1.8V) = forced-PWM mode GND = ultrasonic mode Output-Voltage Sense Input for SMPS2. OUT2 is an input to the Quick-PWM on-time one-shot timer. OUT2 also serves as the feedback input for the preset 3.3V. Valley Current-Limit Adjustment for SMPS2. The GND - LX2 current-limit threshold is 1/10 the voltage present on ILIM2 over a 0.2V to 2V range. An internal 5A current source allows this voltage to be set with a single resistor between ILIM2 and analog ground. Exposed Pad. Connect backside exposed pad to analog GND and power GND.
MAX17031
9
PGOOD
10 11 12 13 14 15 16 17 18 19 20 21
ON1 DH1 LX1 BST1 DL1 VDD GND DL2 BST2 LX2 DH2 ON2
22
SKIP
23
OUT2
24 --
ILIM2 EP
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Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies MAX17031
CIN 4x 10F 25V INPUT (VIN)* 7V TO 24V
CIN_PIN 0.1F
IN NH1 CBST1 0.1F DH1 BST1 LX1 COUT1 D1 NL1 DL1 DL2 NL2 D2 DH2 BST2 LX2 COUT2 CBST2 0.1F NH2
L1 5V OUTPUT
L2 3.3V OUTPUT
MAX17031
OUT1 DX1 C5 10nF OUT2 R6 100k PGOOD DX2 C7 10nF RTC C3 1F RTC SUPPLY COMBINED POWER-GOOD
C6 0.1F
12V TO 15V CHARGE PUMP
C8 0.1F
R4 1M SKIP REF R5 200k VDD GND
C4 0.1F
5V LDO OUTPUT R1 47 POWER GROUND ANALOG GROUND C2 1.0F RILIM1 C1 4.7F
LDO5
VCC
ON1 ON2 ONLDO RILIM2
ON OFF
ILIM1
PAD
ILIM2
*NOTE: LOWER INPUT VOLTAGES REQUIRE ADDITIONAL INPUT CAPACITANCE. IF OPERATING NEAR DROPOUT, COMPONENT SELECTION MUST BE CAREFULLY DONE TO ENSURE PROPER OPERATION.
Figure 1. Standard Application Circuit--Main Supply
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Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies MAX17031
Table 1. Component Selection for Standard Applications
COMPONENT Input Voltage Input Capacitor (CIN) SMPS 1 Output Capacitor (COUT1) Inductor (L1) High-Side MOSFET (NH1) Low-Side MOSFET (NL1) Current-Limit Resistor (RILIM1) SMPS 2 Output Capacitor (COUT2) Inductor (L2) High-Side MOSFET (NH2) Low-Side MOSFET (NL2) Current-Limit Resistor (RILIM2) 2x 150F, 4V, 35m SANYO 4TPE150MAZB 2.2H, 5.4m , 14A Sumida CEP125U Siliconix Si4684DY 9.2m /11.5m , 30V Siliconix Si4430BDY 4.8m /6.0m , 30V 71k 2x 100F, 6V, 35m SANYO 6TPE100MAZB 4.3H, 11.4m , 11A Sumida CEP125U Siliconix Si4800BDY 23m /30m 30V Siliconix Si4812BDY 16.5m /20m 71k 400kHz/300kHz SMPS1: 5V AT 5A SMPS2: 3.3V AT 8A VIN = 7V to 24V 4X 10F, 25V Taiyo Yuden TMK432BJ106KM
Table 2. Component Suppliers
SUPPLIER AVX Corp. Central Semiconductor Corp. Fairchild Semiconductor International Rectifier KEMET Corp. NEC/TOKIN America, Inc. Panasonic Corp. Philips/nxp Semiconductor Pulse Engineering Renesas Technology Corp. SANYO Electric Co., Ltd. Sumida Corp. Taiyo Yuden TDK Corp. WEBSITE www.avx.com www.centralsemi.com www.fairchildsemi.com www.irf.com www.kemet.com www.nec-tokinamerica.com www.panasonic.coml www.semiconductors.philips.com www.pulseeng.com www.renesas.com www,sanyodevice.com www.sumida.com www.t-yuden.com www.component.tdk.com www.tokoam.com www.vishay.com www.we-online.com
30V
TOKO America, Inc. Vishay (Dale, Siliconix) Wurth Elektronik GmbH & Co. KG
Detailed Description
The MAX17031 step-down controller is ideal for highvoltage, low-power supplies for notebook computers. Maxim's Quick-PWM pulse-width modulator in the MAX17031 is specifically designed for handling fast load steps while maintaining a relatively constant operating frequency and inductor operating point over a wide range of input voltages. The Quick-PWM architecture circumvents the poor load-transient timing problems of fixed-frequency current-mode PWMs, while also avoiding the problems caused by widely varying switching frequencies in conventional constant-on-time and constant-off-time PWM schemes. Figure 2 is the functional diagram overview and Figure 3 is the QuickPWM core functional diagram.
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Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies MAX17031
IN SKIP 3.3V LINEAR REGULATOR LDO BYPASS CIRCUITRY BYP
TON 5V LINEAR REGULATOR ONLDO LDO5
RTC
SECFB ILIM1 OUT1 VDD PWM2 CONTROLLER (FIGURE 3) VDD
ILIM2 OUT2 VDD
BST2 DH2 LX2
BST1 DH1 LX1 DL1 VDD
PWM1 CONTROLLER (FIGURE 3)
DL2
FB2 SELECT (PRESET 3.3V)
FAULT2
FB1 SELECT (PRESET 5V)
ON2 UVLO
ON1 UVLO
FAULT1
PGOOD
POWER-GOOD AND FAULT PROTECTION
POWER-GOOD AND FAULT PROTECTION
VCC
MAX17031
PAD
2V REF
REF GND
Figure 2. Functional Diagram Overview
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Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies MAX17031
INTEGRATOR
REF FB ANALOG SOFT-START/ SOFT-STOP
FB INT PRESET OR EXT ADJ
REFIN
SLOPE COMP
ON GND AGND Q tOFF(MIN) TRIG ONE-SHOT S Q R* *RESET DOMINATE AGND LX VCC ON-TIME COMPUTE TON IN NEG CURRENT LIMIT tON Q TRIG ONE-SHOT DH DRIVER
VALLEY CURRENT LIMIT ILIM
ULTRASONIC ZERO CROSSING GND ULTRASONIC THRESHOLD Q TRIG ONE-SHOT
FB REFIN GND
S Q THREE-LEVEL DECODE R
DL DRIVER
SKIP
Figure 3. Functional Diagram--Quick-PWM Core
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Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies
The MAX17031 includes several features for multipurpose notebook functionality, and is specifically designed for 5V/3.3V main power-supply rails. The MAX17031 includes a 100mA, 5V linear regulator (LDO5) ideal for initial power-up of the notebook and main supply. Additionally, the MAX17031 includes a 3.3V, 5mA RTC supply that remains always enabled, which can be used to power the RTC supply and system pullups when the notebook shuts down. The MAX17031 also includes a SKIP mode control input with an accurate threshold that allows an unregulated charge pump or secondary winding to be automatically refreshed--ideal for generating the low-power 12V to 15V load switch supply.
MAX17031
The VDD bias supply input powers the internal gate drivers and the VCC bias supply input powers the analog control blocks. The maximum current required is dominated by the switching losses of the drivers and can be estimated as follows: IBIAS(MAX) = ICC(MAX) + fSWQG 30mA to 60mA (typ)
Free-Running Constant-On-Time PWM Controller with Input Feed-Forward
The Quick-PWM control architecture is a pseudo-fixedfrequency, constant on-time, current-mode regulator with voltage feed-forward. This architecture relies on the output filter capacitor's ESR to act as a currentsense resistor, so the feedback ripple voltage provides the PWM ramp signal. The control algorithm is simple: the high-side switch on-time is determined solely by a one-shot whose pulse width is inversely proportional to input voltage and directly proportional to output voltage. Another one-shot sets a minimum off-time (400ns typ). The on-time one-shot is triggered if the error comparator is low, the low-side switch current is below the valley current-limit threshold, and the minimum off-time one-shot has timed out.
3.3V RTC Power
The MAX17031 includes a low-current (5mA) linear regulator that remains active as long as the input supply (IN) exceeds 2V (typ). The main purpose of this "always-enabled" linear regulator is to power the RTC when all other notebook regulators are disabled. The RTC regulator sources at least 5mA for external loads.
Preset 5V, 100mA Linear Regulator
The MAX17031 includes a high-current (100mA) 5V linear regulator. This LDO5 is required to generate the 5V bias supply necessary to power up the switching regulators. Once the 5V switching regulator (MAX17031 OUT1) is enabled, LDO5 is bypassed to OUT1. The MAX17031 LDO5 sources at least 100mA of supply current.
On-Time One-Shot
The heart of the PWM core is the one-shot that sets the high-side switch on-time. This fast, low-jitter, adjustable one-shot includes circuitry that varies the on-time in response to battery and output voltage. The high-side switch on-time is inversely proportional to the battery voltage as sensed by IN, and proportional to the feedback voltage: t ON = K x VOUT VIN
Bypass Switch The MAX17031 includes an LDO5 bypass switch that allows the LDO5 to be bypassed to OUT1. When OUT1 exceeds 93.5% of the LDO5 output voltage for 500s, then the MAX17031 reduces the LDO5 regulation threshold and turns on an internal p-channel MOSFET to short OUT1 to LDO5. Instead of disabling the LDO5 when the MAX17031 enables the bypass switch, the controller reduces the LDO5 regulation voltage, which effectively places the linear regulator in a standby state while switched over, allowing a fast recovery if the OUT1 drops by 8.5% from LDO5 nominal regulation threshold.
where K (switching period) is set 2.5s for side 1 and 3.3s for side 2. For continuous conduction operation, the actual switching frequency can be estimated by: fSW = t ON x ( VIN + VDROP1 - VDROP2 )
( VOUT + VDROP1)
5V Bias Supply (VCC/VDD) The MAX17031 requires an external 5V bias supply (VDD and VCC) in addition to the battery. Typically, this 5V bias supply is generated by the internal 100mA LDO5 or from the notebook's 95%-efficient 5V main supply. Keeping these bias supply inputs independent improves the overall efficiency. When ONLDO is enabled, VDD and VCC must be supplied from LDO5.
where VDROP1 is the sum of the parasitic voltage drops in the inductor discharge path, including synchronous rectifier, inductor, and PCB resistances; VDROP2 is the sum of the parasitic voltage drops in the charging path, including the high-side switch, inductor, and PCB resistances; and t ON is the on-time calculated by the MAX17031.
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Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies
Modes of Operation
Forced-PWM Mode (VSKIP = 1.8V) The low-noise forced-PWM mode (VSKIP = 1.8V) disables the zero-crossing comparator, which controls the low-side switch on-time. This forces the low-side gatedrive waveform to constantly be the complement of the high-side gate-drive waveform, so the inductor current reverses at light loads while DH maintains a duty factor of VOUT/VIN. The benefit of forced-PWM mode is to keep the switching frequency fairly constant. However, forced-PWM operation comes at a cost: the no-load 5V bias current remains between 20mA to 60mA depending on the switching frequency and MOSFET selection. The MAX17031 automatically uses forced-PWM operation during shutdown regardless of the SKIP configuration. Automatic Pulse-Skipping Mode (VSKIP > 2V) In skip mode (V SKIP > 2V), an inherent automatic switchover to PFM takes place at light loads. This switchover is affected by a comparator that truncates the low-side switch on-time at the inductor current's zero crossing. The zero-crossing comparator output is set by the differential voltage across LX and GND. DC output-accuracy specifications refer to the integrated threshold of the error comparator. When the inductor is in continuous conduction, the MAX17031 regulates the valley of the output ripple and the internal integrator removes the actual DC output-voltage error caused by the output-ripple voltage and internal slope compensation. In discontinuous conduction (VSKIP > 2V and IOUT < ILOAD(SKIP)), the integrator cannot correct for the lowfrequency output ripple error, so the output voltage has a DC regulation level higher than the error comparator threshold by approximately 1.5% due to slope compensation and output ripple voltage. Ultrasonic Mode (VSKIP = GND) Shorting SKIP to ground activates a unique pulseskipping mode with a guaranteed minimum switching frequency of 20kHz. This ultrasonic pulse-skipping mode eliminates audio-frequency modulation that would otherwise be present when a lightly loaded controller automatically skips pulses. In ultrasonic mode, the controller automatically transitions to fixed-frequency PWM operation when the load reaches the same critical conduction point (ILOAD(SKIP)) that occurs when normally pulse skipping.
An ultrasonic pulse occurs (Figure 4) when the controller detects that no switching has occurred within the last 37s. Once triggered, the ultrasonic circuitry pulls DL high, turning on the low-side MOSFET to induce a negative inductor current. After the inductor current reaches the negative ultrasonic current threshold, the controller turns off the low-side MOSFET (DL pulled low) and triggers a constant on-time (DH driven high). When the on-time has expired, the controller reenables the low-side MOSFET until the inductor current drops below the zero-crossing threshold. Starting with a DL pulse greatly reduces the peak output voltage when compared to starting with a DH pulse. The output voltage at the beginning of the ultrasonic pulse determines the negative ultrasonic current threshold, corresponding to: VNEG(US) = ILR CS where RCS is the current-sense resistance seen across LX to GND.
MAX17031
40s (MAX) INDUCTOR CURRENT
ZERO-CROSSING DETECTION
0 ISONIC ON-TIME (tON)
Figure 4. Ultrasonic Waveforms
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Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies
Secondary Feedback (SKIP) When the controller skips pulses (VSKIP > 2V), the long time between pulses (especially if the output is sinking current) allows the external charge-pump voltage or transformer secondary winding voltage to drop. Connecting a resistor-divider between the secondary output to SKIP to ground sets up a minimum refresh threshold. When the SKIP voltage drops below its 2V threshold, the MAX17031 enters forced-PWM mode. This forces the controller to begin switching, allowing the external unregulated charge pump (or transformer secondary winding) to be refreshed.
MAX17031
before reaching the falling POR threshold, DL remains low until the error comparator has been properly powered up and triggers an on-time.
Soft-Start and Soft-Shutdown
The MAX17031 includes voltage soft-start and softshutdown--slowly ramping up and down the target voltage. During startup, the slew-rate control softly slews the target voltage over a 1ms startup period. This long startup period reduces the inrush current during startup. When ON1 or ON2 is pulled low or the output undervoltage fault latch is set, the respective output automatically enters soft-shutdown; the regulator enters PWM mode and ramps down its output voltage over a 1ms period. After the output voltage drops below 0.1V, the MAX17031 pulls DL high, clamping the output and LX switching node to ground, preventing leakage currents from pulling up the output and minimizing the negative output voltage undershoot during shutdown.
Valley Current-Limit Protection
The current-limit circuit employs a unique "valley" current-sensing algorithm that senses the inductor current through the low-side MOSFET--across LX to analog GND. If the current through the low-side MOSFET exceeds the valley current-limit threshold, the PWM controller is not allowed to initiate a new cycle. The actual peak current is greater than the valley currentlimit threshold by an amount equal to the inductor ripple current. Therefore, the exact current-limit characteristic and maximum load capability are a function of the inductor value and battery voltage. When combined with the undervoltage protection circuit, this currentlimit method is effective in almost every circumstance. In forced-PWM mode, the MAX17031 also implements a negative current limit to prevent excessive reverse inductor currents when VOUT is sinking current. The negative current-limit threshold is set to approximately 120% of the positive current limit.
Output Voltage
DC output-accuracy specifications in the Electrical Characteristics table refer to the error comparator's threshold. When the inductor continuously conducts, the MAX17031 regulates the valley of the output ripple, so the actual DC output voltage is lower than the slope-compensated trip level by 50% of the output ripple voltage. For PWM operation (continuous conduction), the output voltage is accurately defined by the following equation: V VOUT(PWM) = VNOM + RIPPLE 2 A CCV where VNOM is the nominal feedback voltage, ACCV is the integrator's gain, and VRIPPLE is the output ripple voltage (VRIPPLE = ESR x IINDUCTOR, as described in the Output Capacitor Selection section). In discontinuous conduction (IOUT < ILOAD(SKIP)), the longer off-times allow the slope compensation to increase the threshold voltage by as much as 1%, so the output voltage regulates slightly higher than it would in PWM operation.
POR, UVLO
When VCC rises above the power-on reset (POR) threshold, the MAX17031 clears the fault latches, forces the low-side MOSFET to turn on (DL high), and resets the soft-start circuit, preparing the controller for power-up. However, the VCC undervoltage lockout (UVLO) circuitry inhibits switching until VCC reaches 4.2V (typ). When V CC rises above 4.2V and the controller has been enabled (ON_ pulled high), the controller activates the enabled PWM controllers and initializes soft-start. When VCC drops below the UVLO threshold (falling edge), the controller stops switching, and DH and DL are pulled low. When the 2V POR falling-edge threshold is reached, the DL state no longer matters since there is not enough voltage to force the switching MOSFETs into a low on-resistance state, so the controller pulls DL high, allowing a soft discharge of the output capacitors (damped response). However, if the V CC recovers
Internal Integrator The internal integrator improves the output accuracy by removing any output accuracy errors caused by the slope compensation, output ripple voltage, and erroramplifier offset. Therefore, the DC accuracy (in forcedPWM mode) depends on the integrator's gain, the integrator's offset, and the accuracy of the integrator's reference input.
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Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies
Power-Good Outputs (PGOOD) and Fault Protection
PGOOD is the open-drain output that continuously monitors both output voltages for undervoltage and overvoltage conditions. PGOOD is actively held low in shutdown (ON1 or ON2 = GND), during soft-start, and soft-shutdown. Approximately 20s (typ) after the softstart terminates, PGOOD becomes high impedance as long as both output voltages exceed 85% of the nominal fixed-regulation voltage. PGOOD goes low if the output voltage drops 15% below the regulation voltage, or if the SMPS controller is shut down. For a logic-level PGOOD output voltage, connect an external pullup resistor between PGOOD and the logic power supply. A 100k pullup resistor works well in most applications.
Thermal-Fault Protection (TSHDN) The MAX17031 features a thermal-fault protection circuit. When the junction temperature rises above +160C, a thermal sensor activates the fault latch, pulls PGOOD low, enables the 10 discharge circuit, and disables the controller--DH and DL pulled low. Toggle ONLDO or cycle IN power to reactivate the controller after the junction temperature cools by 15C.
MAX17031
Design Procedure
Firmly establish the input-voltage range and maximum load current before choosing an inductor operating point (ripple-current ratio). The primary design goal is choosing a good inductor operating point, and the following three factors dictate the rest of the design: * Input Voltage Range: The maximum value (VIN(MAX)) must accommodate the worst-case, high ACadapter voltage. The minimum value (V IN(MIN) ) must account for the lowest battery voltage after drops due to connectors, fuses, and battery-selector switches. If there is a choice at all, lower input voltages result in better efficiency. Maximum Load Current: There are two values to consider. The peak load current (ILOAD(MAX)) determines the instantaneous component stresses and filtering requirements and thus drives output capacitor selection, inductor saturation rating, and the design of the current-limit circuit. The continuous load current (ILOAD) determines the thermal stresses and thus drives the selection of input capacitors, MOSFETs, and other critical heat-contributing components.
Overvoltage Protection (OVP) When the output voltage rises 15% above the fixedregulation voltage, the controller immediately pulls PGOOD low, sets the overvoltage fault latch, and immediately pulls the respective DL_ high--clamping the output fault to GND. Toggle either ON1 or ON2 input, or cycle VCC power below its POR threshold to clear the fault latch and restart the controller. Undervoltage Protection (UVP) When the output voltage drops 30% below the fixedregulation voltage, the controller immediately pulls the PGOOD low, sets the undervoltage fault latch, and begins the shutdown sequence. After the output voltage drops below 0.1V, the synchronous rectifier turns on, clamping the output to GND regardless of the output voltage. Toggle either ON1 or ON2 input, or cycle VCC power below its POR threshold to clear the fault latch and restart the controller.
*
Table 3. Fault Protection and Shutdown Operation Table
MODE Shutdown (ON_ = High to Low) Output UVP (Latched) CONTROLLER STATE Voltage soft-shutdown initiated. Internal error-amplifier target slowly ramped down to GND and output actively discharged (automatically enters forced-PWM mode). Controller shuts down and EA target internally slewed down. Controller remains off until ON_ toggled or VCC power cycled. SMPS controller disabled (assuming ON_ pulled high), 10 output discharge active. SMPS controller disabled (assuming ON_ pulled high), 10 output discharge active. SMPS inactive, 10 output discharge active. DRIVER STATE DL driven high and DH pulled low after soft-shutdown completed (output < 0.1V). DL immediately driven high, DH pulled low. DL and DH pulled low. DL driven high, DH pulled low. DL driven high, DH pulled low.
Output OVP (Latched) UVLO (VCC Falling-Edge) Thermal Fault (Latched) UVLO (VCC Rising Edge) VCC Below POR
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Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies
Inductor Operating Point: This choice provides trade-offs between size vs. efficiency and transient response vs. output ripple. Low inductor values provide better transient response and smaller physical size, but also result in lower efficiency and higher output ripple due to increased ripple currents. The minimum practical inductor value is one that causes the circuit to operate at the edge of critical conduction (where the inductor current just touches zero with every cycle at maximum load). Inductor values lower than this grant no further size-reduction benefit. The optimum operating point is usually found between 20% and 50% value at which PFM/PWM switchover occurs.
MAX17031
VSAG =
( V - VOUT ) K 2C OUT VOUT IN - t OFF(MIN) VIN
L ILOAD(MAX)
(
) 2 VOUTK + t OFF(MIN) V IN
where t OFF(MIN) is the minimum off-time (see the Electrical Characteristics table). The amount of overshoot during a full-load to no-load transient due to stored inductor energy can be calculated as: VSOAR
Inductor Selection
The switching frequency and inductor operating point determine the inductor value as follows: L= VOUT ( VIN - VOUT ) VINfSWILOAD(MAX)LIR
( ILOAD(MAX) ) 2 L
2C OUT VOUT
Setting the Current Limit
The minimum current-limit threshold must be great enough to support the maximum load current when the current limit is at the minimum tolerance value. The valley of the inductor current occurs at ILOAD(MAX) minus half the ripple current; therefore: ILOAD(MAX)LIR ILIM(VAL) > ILOAD(MAX) - 2 where ILIM(VAL) equals the minimum valley current-limit threshold voltage divided by the current-sense resistance (RSENSE). When using a 100k ILIM resistor, the minimum valley current-limit threshold is 40mV. Connect a resistor between ILIM_ and analog ground to set the adjustable current-limit threshold. The valley current-limit threshold is approximately 1/10 the ILIM voltage formed by the external resistance and internal 5A current source. The 40k to 400k adjustment range corresponds to a 20mV to 200mV valley currentlimit threshold. When adjusting the current limit, use 1% tolerance resistors to prevent significant inaccuracy in the valley current-limit tolerance.
For example: ILOAD(MAX) = 4A, VIN = 12V, VOUT2 = 2.5V, fSW = 355kHz, 30% ripple current or LIR = 0.3: L= 2.5V x (12V - 2.5V ) = 4.65H 12V x 355kHz x 4 A x 0.3
Find a low-loss inductor having the lowest possible DC resistance that fits in the allotted dimensions. Ferrite cores are often the best choice, although powdered iron is inexpensive and can work well at 200kHz. The core must be large enough not to saturate at the peak inductor current (IPEAK): LIR IPEAK = ILOAD(MAX) 1 + 2 Most inductor manufacturers provide inductors in standard values, such as 1.0H, 1.5H, 2.2H, 3.3H, etc. Also look for nonstandard values, which can provide a better compromise in LIR across the input voltage range. If using a swinging inductor (where the no-load inductance decreases linearly with increasing current), evaluate the LIR with properly scaled inductance values.
Output Capacitor Selection
The output filter capacitor must have low enough equivalent series resistance (ESR) to meet output ripple and load-transient requirements, yet have high enough ESR to satisfy stability requirements. For processor core voltage converters and other applications where the output is subject to violent load transients, the output capacitor's size depends on how much ESR is needed to prevent the output from dipping too low under a load transient. Ignoring the sag due to finite capacitance:
Transient Response
The inductor ripple current also impacts transientresponse performance, especially at low VIN - VOUT differentials. Low inductor values allow the inductor current to slew faster, replenishing charge removed from the output filter capacitors by a sudden load step. The amount of output sag is also a function of the maximum duty factor, which can be calculated from the ontime and minimum off-time:
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Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies
R ESR VSTEP ILOAD(MAX) Do not put high-value ceramic capacitors directly on OUT1 and OUT2 pins to ensure stability. Large ceramic capacitors can have a high-ESR zero frequency and cause erratic, unstable operation. However, it is easy to add enough series resistance by placing the capacitors a couple of inches downstream from the feedback sense point, which should be as close as possible to the inductor. Unstable operation manifests itself in two related but distinctly different ways: double-pulsing and fast-feedback loop instability. Double-pulsing occurs due to noise on the output or because the ESR is so low that there is not enough voltage ramp in the output-voltage signal. This "fools" the error comparator into triggering a new cycle immediately after the 400ns minimum offtime period has expired. Double-pulsing is more annoying than harmful, resulting in nothing worse than increased output ripple. However, it can indicate the possible presence of loop instability due to insufficient ESR. Loop instability results in oscillations at the output after line or load steps. Such perturbations are usually damped, but can cause the output voltage to rise above or fall below the tolerance limits. The easiest method for checking stability is to apply a very fast zero-to-max load transient and carefully observe the output-voltage ripple envelope for overshoot and ringing. It can help to simultaneously monitor the inductor current with an AC current probe. Do not allow more than one cycle of ringing after the initial step-response under/overshoot.
MAX17031
In applications without large and fast load transients, the output capacitor's size often depends on how much ESR is needed to maintain an acceptable level of output voltage ripple. The output ripple voltage of a stepdown controller equals the total inductor ripple current multiplied by the output capacitor's ESR. Therefore, the maximum ESR required to meet ripple specifications is: VRIPPLE R ESR ILOAD(MAX)LIR The actual capacitance value required relates to the physical size needed to achieve low ESR, as well as to the chemistry of the capacitor technology. Thus, the capacitor is usually selected by ESR and voltage rating rather than by capacitance value (this is true of tantalums, OS-CONs, polymers, and other electrolytics). When using low-capacity filter capacitors, such as ceramic capacitors, size is usually determined by the capacity needed to prevent V SAG and V SOAR from causing problems during load transients. Generally, once enough capacitance is added to meet the overshoot requirement, undershoot at the rising load edge is no longer a problem (see the VSAG and VSOAR equations in the Transient Response section). However, lowcapacity filter capacitors typically have high ESR zeros that might affect the overall stability (see the Output Capacitor Stability Considerations section).
Output Capacitor Stability Considerations
For Quick-PWM controllers, stability is determined by the value of the ESR zero relative to the switching frequency. The boundary of instability is given by the following equation: f fESR SW where: fESR = 1 2 x R ESR x C OUT
Input Capacitor Selection
The input capacitor must meet the ripple current requirement (IRMS) imposed by the switching currents: V OUT ( VIN - VOUT ) IRMS = ILOAD VIN For most applications, nontantalum chemistries (ceramic, aluminum, or OS-CON) are preferred due to their resistance to power-up surge currents typical of systems with a mechanical switch or connector in series with the input. If the MAX17031 is operated as the second stage of a two-stage power conversion system, tantalum input capacitors are acceptable. In either configuration, choose a capacitor that has less than 10C temperature rise at the RMS input current for optimal reliability and lifetime.
For a typical 300kHz application, the ESR zero frequency must be well below 95kHz, preferably below 50kHz. Tantalum and OS-CON capacitors in widespread use at the time of publication have typical ESR zero frequencies of 25kHz. In the design example used for inductor selection, the ESR needed to support 25mVP-P ripple is 25mV/1.2A = 20.8m. One 220F/4V SANYO polymer (TPE) capacitor provides 15m (max) ESR. This results in a zero at 48kHz, well within the bounds of stability.
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Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies MAX17031
Power-MOSFET Selection
Most of the following MOSFET guidelines focus on the challenge of obtaining high load-current capability when using high-voltage (> 20V) AC adapters. Lowcurrent applications usually require less attention. The high-side MOSFET (NH) must be able to dissipate the resistive losses plus the switching losses at both VIN(MIN) and VIN(MAX). Ideally, the losses at VIN(MIN) should be roughly equal to the losses at VIN(MAX), with lower losses in between. If the losses at VIN(MIN) are significantly higher, consider increasing the size of NH. Conversely, if the losses at VIN(MAX) are significantly higher, consider reducing the size of NH. If VIN does not vary over a wide range, maximum efficiency is achieved by selecting a high-side MOSFET (NH) that has conduction losses equal to the switching losses. Choose a low-side MOSFET (NL) that has the lowest possible on-resistance (RDS(ON)), comes in a moderate-sized package (i.e., 8-pin SO, DPAK, or D2PAK), and is reasonably priced. Ensure that the MAX17031 DL_ gate driver can supply sufficient current to support the gate charge and the current injected into the parasitic drain-to-gate capacitor caused by the high-side MOSFET turning on; otherwise, cross-conduction problems could occur. Switching losses are not an issue for the low-side MOSFET since it is a zero-voltage switched device when used in the step-down topology. characteristics. The following switching loss calculation provides only a very rough estimate and is no substitute for breadboard evaluation, preferably including verification using a thermocouple mounted on NH: VIN(MAX)ILOADfSW Q G(SW) PD (NH Switching) = IGATE V 2C f + IN OSS SW 2 where COSS is the high-side MOSFET's output capacitance, QG(SW) is the charge needed to turn on the highside MOSFET, and I GATE is the peak gate-drive source/sink current (1A typ). Switching losses in the high-side MOSFET can become a heat problem when maximum AC adapter voltages are applied due to the squared term in the switchingloss equation provided above. If the high-side MOSFET chosen for adequate RDS(ON) at low battery voltages becomes extraordinarily hot when subjected to V IN(MAX) , consider choosing another MOSFET with lower parasitic capacitance. For the low-side MOSFET (NL), the worst-case power dissipation always occurs at maximum battery voltage: V 2 PD (NL Resistive) = 1- OUT (ILOAD ) R DS(ON) V IN(MAX) The absolute worst case for MOSFET power dissipation occurs under heavy overload conditions that are greater than ILOAD(MAX) but are not high enough to exceed the current limit and cause the fault latch to trip. To protect against this possibility, "overdesign" the circuit to tolerate: ILOAD(MAX)LIR ILOAD = I VALLEY(MAX) + 2 where I VALLEY(MAX) is the maximum valley current allowed by the current-limit circuit, including threshold tolerance and sense-resistance variation. The MOSFETs must have a relatively large heatsink to handle the overload power dissipation. Choose a Schottky diode (DL) with a forward voltage drop low enough to prevent the low-side MOSFET's body diode from turning on during the dead time. As a general rule, select a diode with a DC current rating equal to 1/3 the load current. This diode is optional and can be removed if efficiency is not critical.
Power-MOSFET Dissipation
Worst-case conduction losses occur at the duty factor extremes. For the high-side MOSFET (NH), the worstcase power dissipation due to resistance occurs at minimum input voltage: V 2 PD (NH Resistive) = OUT (ILOAD ) R DS(ON) VIN Generally, use a small high-side MOSFET to reduce switching losses at high input voltages. However, the RDS(ON) required to stay within package power-dissipation limits often limits how small the MOSFET can be. The optimum occurs when the switching losses equal the conduction (RDS(ON)) losses. High-side switching losses do not become an issue until the input is greater than approximately 15V. Calculating the power dissipation in high-side MOSFETs (NH) due to switching losses is difficult, since it must allow for difficult-to-quantify factors that influence the turn-on and turn-off times. These factors include the internal gate resistance, gate charge, threshold voltage, source inductance, and PCB layout
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Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies
Applications Information
Step-Down Converter Dropout Performance
The output voltage-adjustable range for continuousconduction operation is restricted by the nonadjustable minimum off-time one-shot. When working with low input voltages, the duty-factor limit must be calculated using worst-case values for on- and off-times. Manufacturing tolerances and internal propagation delays introduce an error to the TON K-factor. This error is greater at higher frequencies. Also, keep in mind that transient response performance of buck regulators operated too close to dropout is poor, and bulk output capacitance must often be added (see the VSAG equation in the Design Procedure section). The absolute point of dropout is when the inductor current ramps down during the minimum off-time (IDOWN) as much as it ramps up during the on-time (IUP). The ratio h = IUP/IDOWN indicates the controller's ability to slew the inductor current higher in response to increased load, and must always be greater than 1. As h approaches 1, the absolute minimum dropout point, the inductor current cannot increase as much during each switching cycle, and V SAG greatly increases unless additional output capacitance is used. A reasonable minimum value for h is 1.5, but adjusting this up or down allows trade-offs between VSAG, output capacitance, and minimum operating voltage. For a given value of h, the minimum operating voltage can be calculated as: VIN(MIN) = VOUT + VDROP2 h x t OFF(MIN) 1- K * * tOFF(MIN) = 500ns VDROP2 = 100mV h = 1.5: VIN(MIN) = 2.5V + 0.1V = 3.47V 1.5 x 500ns 1- 3.0s
MAX17031
Calculating again with h = 1 and the typical K-factor value (K = 3.3s) gives the absolute limit of dropout: VIN(MIN) = 2.5V + 0.1V = 3.06V 1 x 500ns 1- 3.3s
Therefore, VIN must be greater than 3.06V, even with very large output capacitance, and a practical input voltage with reasonable output capacitance would be 3.47V.
PCB Layout Guidelines
Careful PCB layout is critical to achieving low switching losses and clean, stable operation. The switching power stage requires particular attention. If possible, mount all the power components on the top side of the board, with their ground terminals flush against one another. Follow these guidelines for good PCB layout: * Keep the high-current paths short, especially at the ground terminals. This practice is essential for stable, jitter-free operation. * Keep the power traces and load connections short. This practice is essential for high efficiency. Using thick copper PCBs (2oz vs. 1oz) can enhance fullload efficiency by 1% or more. Correctly routing PCB traces is a difficult task that must be approached in terms of fractions of centimeters, where a single milliohm of excess trace resistance causes a measurable efficiency penalty. Minimize current-sensing errors by connecting LX_ directly to the drain of the low-side MOSFET. When trade-offs in trace lengths must be made, it is preferable to allow the inductor charging path to be made longer than the discharge path. For example, it is better to allow some extra distance between the input capacitors and the high-side MOSFET than to allow distance between the inductor and the lowside MOSFET or between the inductor and the output filter capacitor. Route high-speed switching nodes (BST_, LX_, DH_, and DL_) away from sensitive analog areas (REF, and OUT_).
where V DROP2 is the parasitic voltage drop in the charge path (see the On-Time One-Shot section), tOFF(MIN) is from the Electrical Characteristics table, and K (1/fSW) is the switching period. The absolute minimum input voltage is calculated with h = 1. If the calculated VIN(MIN) is greater than the required minimum input voltage, then operating frequency must be reduced or output capacitance added to obtain an acceptable VSAG. If operation near dropout is anticipated, calculate VSAG to be sure of adequate transient response. Dropout Design Example: VOUT2 = 2.5V fSW = 355kHz K = 3.0s, worst-case KMIN = 3.3s
*
A sample layout is available in the MAX17031 Evaluation Kit data sheet.
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Dual Quick-PWM Step-Down Controller with LowPower LDO and RTC Regulator for MAIN Supplies MAX17031
Layout Procedure
1) Place the power components first, with ground terminals adjacent (NL_ source, CIN, COUT_, and DL_ anode). If possible, make all these connections on the top layer with wide, copper-filled areas. 2) Mount the controller IC adjacent to the low-side MOSFET, preferably on the back side opposite NL_ and NH_ in order to keep LX_, GND, DH_, and the DL_ gate-drive lines short and wide. The DL_ and DH_ gate traces must be short and wide (50 mils to 100 mils wide if the MOSFET is 1in from the controller IC) to keep the driver impedance low and for proper adaptive dead-time sensing. 3) Group the gate-drive components (BST_ capacitor, VDD bypass capacitor) together near the controller IC. 4) Make the DC-DC controller ground connections as shown in Figure 1. This diagram can be viewed as having two separate ground planes: power ground, where all the high-power components go; and an analog ground plane for sensitive analog components. The analog ground plane and power ground plane must meet only at a single point directly at the IC. 5) Connect the output power planes directly to the output filter capacitor positive and negative terminals with multiple vias. Place the entire DC-DC converter circuit as close to the load as is practical.
Chip Information
TRANSISTOR COUNT: 12,197 PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE 24 TQFN PACKAGE CODE T2444-3 DOCUMENT NO. 21-0139
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
24 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

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